1. Field of the Invention
Embodiments of the present invention relate generally to context switching and, more particularly, to a method and a system for context switching a processing pipeline based on a halt protocol.
2. Description of the Related Art
A context switch is a feature of a multitasking operating system that allows for a switch in execution from one computing thread or process to another. This feature ensures that a processor cannot be monopolized by any one processor-intensive thread or process. During a context switch, the states of the processor of the currently running process are stored in memory and the processor is restored with states of another process that was previously stored in memory.
In graphics applications, a number of threads may be mutiprocessed through one or more graphics pipelines that are managed by a graphics processing unit (GPU). FIG. 1 is a simplified block diagram of a computer system 100 that includes a graphics pipeline 126 within a GPU 120. In addition to the graphics pipeline 126, the GPU 120 is shown to include a host unit 122, a front end (FE) 124, and a memory interface 128. The host unit 122 schedules the processing of different threads through the graphics pipeline 126, and the FE 124 manages the context switching for the graphics pipeline 126. Each of the host unit 122, the FE 124 and the graphics pipeline 126 has access to a local graphics memory 130, e.g., a frame buffer, through the memory interface 128. The GPU 120 and the local graphics memory 130 represent a graphics subsystem that is accessed by a central processing unit (CPU) 110 of the computer system 100 using a driver that is stored in a system memory 112.
A context switch does not occur immediately upon a command from the host unit 122. When the FE 124 receives a context switch command from the host unit 122, it may perform context switching in accordance with a predefined protocol, e.g., the wait-for-idle (WFI) protocol or the halt sequencing protocol. According to the WFI protocol, the FE 124 suspends sending commands down the graphics pipeline 126 and then waits for an idle status signal from each of the units of the graphics pipeline 126. A context switch occurs only after the FE 124 receives an idle status signal from each of the units of the graphics pipeline 126. This ensures that the graphics pipeline 126 is completely drained prior to the context switch.
According to the halt sequencing protocol, the FE 124 suspends sending commands down the graphics pipeline 126 and issues a halt request signal to the units of graphics pipeline 126, which report back their status as being idle, halted or neither. When all of the units of graphics pipeline 126 report their status as being idle or halted, the FE 124 issues a freeze signal to them. After the units of graphics pipeline 126 have been frozen, the FE 124 performs the context switch. The halt sequencing protocol is described in detail in U.S. application Ser. No. 11/252,855, entitled “Context Switching using Halt Sequencing Protocol,” filed Oct. 18, 2005, the entire contents of which are incorporated by reference herein.
The halt sequencing protocol enables dynamic page memory management by allowing a unit of the graphics pipeline 126 to go into a halted state when a page fault is generated in response to a memory access and then performing a context switch to another process. Halting a unit, however, may cause problems if a unit that is directly upstream in the graphics pipeline 126 continues to send data down to the halted unit. This may happen, for example, when the downstream unit goes into a halted state because it has no other choice (e.g., a page fault was generated in response to a memory request) but the upstream unit continues to send data down to the halted unit because the upstream unit cannot be halted and needs to drain completely before it can be context switched.